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Brinson, Mike, Jahn, Stefan and Cullinan, Michael (2009) Advances in compact semiconductor device modelling and circuit macromodelling with the Qucs GPL circuit simulator. In: Arbeitskreis MOS-Modelle und Parameterextraktion MOS Modeling and Parameter Extraction Working Group MOS-AK Meeting., 3 April 2009, IHP Frankfurt/Oder, Germany.
Advances in circuit simulation technology suggest a strong movement towards software packages which promote equation based compact semiconductor device model and circuit macromodel development. The Verilog-A subset of the Verilog- AMS hardware description language being a popular choice of hardware description language for model construction. The Qucs circuit simulator is one of the GPL software packages supporting the MOS-AK Verilog-A standardisation initiative. This paper outlines recent advances in Qucs equation based modelling techniques, including (1) Qucs equation defined device/Verilog-A compatibility improvements, (2) non-linear radio frequency equation defined device modelling techniques, (3) modelling non-linear physical processes, and (4) methods for construction Verilog-A models for established and new technologies. The paper also presents a number of examples which illustrate the capabilities of the Qucs model construction tools implemented by the Qucs development team.
Available under License Creative Commons Attribution No Derivatives 4.0.
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