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Brinson, Mike and Tomaszewski, Daniel (2022) Advances in Qucs-S schematic capture for SPICE and Verilog-A device modelling and circuit simulation. Proceedings of the 2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES). pp. 27-32. ISSN ISBN: 978-83-63578-22-0
Grabinski, Wladek, Pavanello, Marcelo, De Souza, Michelly, Tomaszewski, Daniel, Malesinska, Jola, Głuszko, Grzegorz, Bucher, Matthias, Makris, Nikolaos, Nikolaou, Aristeidis, Abo-Elhadid, Ahmed, Mierzwinski, Marek, Lemaitre, Laurent, Brinson, Mike, Lallement, Christophe, Sallese, Jean-Michel, Yoshitomi, Sadayuki, Malisse, Paul, Oguey, Henri, Cserveny, Stefan, Enz, Christian, Krummenacher, François and Vittoz, Eric (2019) FOSS EKV2.6 at GitHub. Arbeitskreis Modellierung von Systemen und Parameterextraktion ( Modeling of Systems and Parameter Extraction Working Group).
Brinson, Mike, Grabinski, Wladek, Pavanello, Marcelo, De Souza, Michelly, Tomaszewski, Daniel, Malesinska, Jola, Głuszko, Grzegorz, Bucher, Matthias, Makris, Nikolaos, Nikolaou, Aristeidis, Abo-Elhadid, Ahmed, Mierzwinski, Marek, Lemaitre, Laurent, Lallement, Christophe, Sallese, Jean-Michel, Yoshitomi, Sadayuki, Malisse, Paul, Oguey, Henri, Cserveny, Stefan, Enz, Christian, Krummenacher, François and Vittoz, Eric (2019) FOSS EKV2.6 Verilog-A Compact MOSFET Model. Proceedings of ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC). pp. 190-193. ISSN ISBN: 978-1-7281-1539-9
Tomaszewski, Daniel, Gluszko, Grzegorz, Brinson, Mike, Kuznetsov, Vadim and Grabinski, Wladek (2016) FOSS as an efficient tool for extraction of MOSFET compact model parameters. Proceedings of the 23rd International Conference on mixed design of integrated circuits (MIXDES). pp. 68-73. ISSN Electronic ISBN: 978-83-63578-09-1, CD-ROM ISBN: 978-83-63578-08-4