Qucs Equation-Defined Device modelling with a Verilog-A Prototyping Platform

Brinson, Mike, Kuznetsov, Vadim and Grabinski, Wladek (2015) Qucs Equation-Defined Device modelling with a Verilog-A Prototyping Platform. In: Modeling of Systems and Parameter Extraction Working Group., 9 December 2015, 8th International MOS-AK Workshop, (co-located with the IEDM Conference and CMC Meeting) Washington DC..

Preview

Text T14_Mike_Brinson_MOS-AK_Washington_DC_2015.pdf - Published Version Available under License Creative Commons Attribution No Derivatives. Download (2MB) | Preview

Abstract / Description

Since it was first added to Qucs in 2007 Equation-Defined Device (EDD) modelling has become an established model building technique. Originally implemented as a convenient interactive method for constructing experimental compact models, today it is widely used for developing non-linear models of established and emerging technology devices.This presentation introduces a new Qucs EDD to Verilog-A compact model synthesis tool. The background, operation and application of this new Qucs feature are introduced in the presentation, together with a number example modelling cases. The synthesis tool has been released under the General Public Licence as open-source software in support of compact modelling research. It forms part of the Qucs Development Team commitment to the MOS-AK Verilog-A standardisation initiative.

Item Type:	Conference or Workshop Item (Paper)
Uncontrolled Keywords:	Qucs-0.0.19/S structure
Subjects:	600 Technology > 620 Engineering & allied operations
Department:	School of Computing and Digital Media
Depositing User:	Mike Brinson
Date Deposited:	22 Nov 2018 11:38
Last Modified:	22 Nov 2018 11:38
URI:	https://repository.londonmet.ac.uk/id/eprint/3960

Downloads

Actions (login required)

View Item