High performance on-chip array antenna for terahertz integrated circuits

Alibakhshikenari, Mohammad, Virdee, Bal Singh, See, Chan, Abd-Alhameed, Raed and Limiti, Ernesto (2019) High performance on-chip array antenna for terahertz integrated circuits. In: 44th International Conference on Infrared, Millimeter, and Terahertz Waves, 1-6 September 2019, Paris, France. (Unpublished)

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Official URL: https://ieeexplore.ieee.org/abstract/document/8874...

Abstract / Description

In this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon technology for operation over 0.6-0.65 THz. The proposed array structure is constructed on three layers composed of Silicon-Ground-Silicon layers. Two antennas are implemented on the top layer, where each antenna is constituted from three sub-antennas. The sub-antennas are constructed from interconnected dual-rings. Also, the sub-antennas are interconnected to each other. This approach enhances the aperture of the array. Surface waves and substrate losses in the structure are suppressed with metallic via-holes implemented between the radiation elements. To excite the structure, a novel feeding mechanism is used comprising open-circuited microstrip lines that couple electromagnetic energy from the bottom layers to the antennas on the top-layer through slot-lines in the middle ground-plane layer. Simulation results show the proposed on-chip antenna array has an average radiation gain, efficiency, and isolation of 7.82 dBi, 32.67%, and -33 dB, respectively.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: terahertz integrated circuits; THz; CMOS 20μm Silicon technology
Subjects: 600 Technology > 620 Engineering & allied operations
Department: School of Computing and Digital Media
Depositing User: Bal Virdee
Date Deposited: 20 Dec 2019 09:03
Last Modified: 20 Dec 2019 09:03
URI: https://repository.londonmet.ac.uk/id/eprint/5398


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