A Hybrid Verilog-A and Equation-defined Subcircuit Approach to MOS Switched Current Analog Cell Simulation

Brinson, Mike, Jahn, Stefan and Nabijou, Hassan (2012) A Hybrid Verilog-A and Equation-defined Subcircuit Approach to MOS Switched Current Analog Cell Simulation. IETE Journal of Research, 58 (3). pp. 181-191. ISSN 0377-2063

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Abstract / Description

Conventional modeling and simulation of two-phase switched current MOS-integrated circuits is normally undertaken at semiconductor device level. This allows primary and secondary circuit effects to be studied and characterized. However, with the growing complexity of these circuits, transient domain simulation times can become prohibitively long, restricting the size of circuit that can be easily investigated. Measurable reductions in transient simulation run times can be achieved by modeling part, or all, of a switched current design as a macromodel. This paper introduces a hybrid approach to MOS switched current circuit modeling that combines the primary features of compact device modeling with functional circuit macromodeling. To illustrate the proposed hybrid modeling procedure the properties, and simulation model, of a MOS switched current analog memory cell are described. The material presented also demonstrates how recent trends in “Quite universal circuit simulator” (QUCS) technology promote embedded Verilog-A models and equation-defined subcircuits as integral elements in mixed-mode circuit and system design.

Item Type: Article
Uncontrolled Keywords: Circuit macromodels; Compact semiconductor device models; Equation-defined device modeling; Quite Universal Circuit Simulator (Qucs); Qucs universal circuit simulator; Switched current analog integrated circuits; Verilog-A
Subjects: 600 Technology > 620 Engineering & allied operations
Department: School of Computing and Digital Media
Depositing User: Mike Brinson
Date Deposited: 04 Nov 2019 10:14
Last Modified: 04 Nov 2019 10:14
URI: https://repository.londonmet.ac.uk/id/eprint/5263


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