GNU simulators supporting Verilog-A compact model standardization

Brinson, Mike, Jahn, Stefan, Margraf, Michael, Parruitte, Hélène, Ardouin, B., Nenzi, Paolo and Lemaitre, Laurent (2007) GNU simulators supporting Verilog-A compact model standardization. In: MOS-AK international Meeting, 20 April 2007, Premstaetten, Germany.

Abstract

This poster explains about Qucs: Quite Universal Circuit Simulator, ADMS: Verilog-A Compact Model Generator and NGSpice: mixed-level/mixed-signal circuit simulator.

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