GNU simulators supporting Verilog-A compact model standardization

Brinson, Mike, Jahn, Stefan, Margraf, Michael, Parruitte, Hélène, Ardouin, B., Nenzi, Paolo and Lemaitre, Laurent (2007) GNU simulators supporting Verilog-A compact model standardization. In: MOS-AK international Meeting, 20 April 2007, Premstaetten, Germany.

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Abstract / Description

This poster explains about Qucs: Quite Universal Circuit Simulator, ADMS: Verilog-A Compact Model Generator and NGSpice: mixed-level/mixed-signal circuit simulator.

Item Type:	Conference or Workshop Item (Poster)
Uncontrolled Keywords:	Quite Universal Circuit Simulator (Qucs); Verilog-A compact model generator (ADMS); Next Generation SPICE (Ngspice)
Subjects:	600 Technology > 620 Engineering & allied operations
Department:	School of Computing and Digital Media
Depositing User:	Mike Brinson
Date Deposited:	04 Nov 2019 10:00
Last Modified:	04 Nov 2019 10:00
URI:	https://repository.londonmet.ac.uk/id/eprint/5260

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