High performance on-chip array antenna for terahertz integrated circuits

Alibakhshikenari, Mohammad, Virdee, Bal Singh, See, Chan, Abd-Alhameed, Raed and Limiti, Ernesto (2019) High performance on-chip array antenna for terahertz integrated circuits. In: 44th International Conference on Infrared, Millimeter, and Terahertz Waves, 1-6 September 2019, Paris, France. (Unpublished)

Abstract

In this letter a novel on-chip array antenna is investigated which is based on CMOS 20μm Silicon technology for operation over 0.6-0.65 THz. The proposed array structure is constructed on three layers composed of Silicon-Ground-Silicon layers. Two antennas are implemented on the top layer, where each antenna is constituted from three sub-antennas. The sub-antennas are constructed from interconnected dual-rings. Also, the sub-antennas are interconnected to each other. This approach enhances the aperture of the array. Surface waves and substrate losses in the structure are suppressed with metallic via-holes implemented between the radiation elements. To excite the structure, a novel feeding mechanism is used comprising open-circuited microstrip lines that couple electromagnetic energy from the bottom layers to the antennas on the top-layer through slot-lines in the middle ground-plane layer. Simulation results show the proposed on-chip antenna array has an average radiation gain, efficiency, and isolation of 7.82 dBi, 32.67%, and -33 dB, respectively.

Documents
5398:28989
[img]
Preview
Manuscript I_IRMMW-THZ 2019.pdf - Accepted Version
Available under License Creative Commons Attribution Non-commercial No Derivatives 4.0.

Download (254kB) | Preview
Details
Record
Statistics

Downloads

Downloads per month over past year



Downloads each year

View Item View Item